A semiconductor device typically includes a network of circuits that are formed over a substrate. The device may consist of several layers of circuit wiring, with various interconnects being used to connect these layers to each other and any underlying transistors. Generally, as a part of the manufacturing process, vias or contact holes are formed in a patterning layer, transferred to an underlying layer, and then filled with a metal to form interconnects, so that the various layers of circuitry are in electrical communication with each other.
Prior art methods of forming interconnects generally rely on a series of lithographic and etching steps to define the positions and dimensions of the vias, which in turn define the positions and dimensions of the corresponding interconnects. To this end, photoresists and hard masks may be employed. However, the dimensions of features formed using conventional optical lithography techniques for volume manufacturing (e.g., 193 nm dry and immersion lithography) have reached the resolution limit of the lithographic tools. The creation of vias with adequate critical dimension (CD) uniformity at tighter pitch is one of major challenges for future technology nodes. The International Technology Roadmap for Semiconductors (ITRS) requires an overall CD variation (3 sigma variation, where sigma is the standard deviation of the critical dimension) of less than 10% of the CD to ensure reasonable device performance (see the ITRS Lithography Roadmap, 2007 Edition, pp. 12-13). However, this is expected to be difficult beyond the 22 nm node using conventional optical lithography, even with expensive and complicated double patterning processes, resolution enhancement technology (computational lithography), and severe layout design restrictions.
Block copolymer (BCP) patterning has attracted attention as a possible solution to the problem of creating patterns with smaller dimensions. Under the right conditions, the blocks of such copolymers phase separate into microdomains (also known as “microphase-separated domains” or “domains”) to reduce the total free energy, and in the process, nanoscale features of dissimilar chemical composition are formed. The ability of block copolymers to form such features recommends their use in nanopatterning, and to the extent that features with smaller CDs can be formed, this should enable the construction of features which would otherwise be difficult to print using conventional lithography.
Directed self-assembly (DSA) is a potential candidate to extend the resolution limit of current lithography by generating self-assembling nanoscale domains on a lithographically defined patterned substrate. This is a method that combines aspects of self-assembly with a lithographically defined substrate to control the spatial arrangement of certain self-assembled BCP domains. One DSA technique is graphoepitaxy, in which self-assembly is guided by topographical features of lithographically pre-patterned substrates. BCP graphoepitaxy provides sub-lithographic, self-assembled features having a smaller characteristic dimension than that of the prepattern itself.